vyges-hold-fix — post-route hold-fix ECO
Part of the Vyges Loom suite (optimizer). Install once with
vyges install loom, then runvyges loom hold-fix. It’s also a standalonevyges-hold-fixbinary on your PATH.
The hold counterpart to the Loom optimizers. Where vyges-resize,
vyges-vt-swap, and vyges-buffer-insert all fix the
late / setup corner, hold violations are the opposite problem — data reaches a capture flop
too early on the min-delay path — and open place-and-route flows often leave a residue of
them after detailed routing. vyges-hold-fix adds delay: it inserts a delay cell in series
on the net feeding each hold-violating capture pin, lifting that pin’s earliest arrival until its
hold constraint is met. Each round is scored by the vyges-sta-si timer, and an
insertion is kept only if the worst hold slack improved and setup stays met — so a slow clock
with ample setup slack trades a little of it for hold closure, never the reverse.
Run it
vyges install loom # one-time: fetch the Loom suite
vyges loom hold-fix demo # instant: close a two-flop hold violation
vyges loom hold-fix run top.holdfix -o fixed.v # delay → hold-fixed netlist
vyges loom hold-fix run top.holdfix --json # before/after WHS + WNS
vyges loom hold-fix run top.holdfix --fail-on-violation # exit 3 if hold still negative (CI gate)
vyges loom hold-fix check top.holdfix # validate the job
A .holdfix job is a superset of a vyges-sta-si .sta job (same design/netlist/lib/
clock or sdc/spef keys) plus the hold knobs: the buffer: (delay cell to insert),
hold_margin: (target hold slack), rounds: (low/medium/high), and dont_touch:.
See the full CLI reference (generated from --help).
Where it sits
routed netlist + .lib + .spef + constraints → hold-fixed netlist + before/after WHS and WNS.
A post-route ECO — with spef: present it scores the fix against real routed parasitics. It
decides which capture pins to delay and how deep a chain each needs; placement + routing of
the inserted cells is handed back to the flow. See the data spine.
Domain coverage
vyges-hold-fix inserts standard-cell delay/buffer cells on data paths in a gate-level
netlist, scored by the digital vyges-sta-si timer — it is digital
optimization. It does not apply to analog / mixed-signal blocks. For analog / MS physical &
integrity verification, see lvs, layout, em-ir,
thermal, and extract.
Source & releases
- Repo: https://github.com/vyges-tools/hold-fix
- Binaries: https://github.com/vyges-tools/hold-fix/releases
- Apache-2.0. Per-foundry calibration plugins are separate (NDA).