Keyboard shortcuts

Press ← or → to navigate between chapters

Press S or / to search in the book

Press ? to show this help

Press Esc to hide this help

vyges-extract — parasitic extraction

Part of the Vyges Loom suite. Install once with vyges install loom, then run vyges loom extract. It’s also a standalone vyges-extract binary on your PATH (the integration contract for flow authors).

vyges-extract reads a routed layout and the PDK’s parasitic rules and produces SPEF — the resistance and capacitance of every net — so timing and power analysis reason about the real interconnect, not an idealized one.

Run it

vyges install loom                                 # one-time: fetch the Loom suite
vyges loom extract demo                            # instant sample SPEF (no setup)
vyges loom extract run  design.ext -o design.spef  # extract RC → SPEF
vyges loom extract run  design.ext --json          # per-net R/C summary
vyges loom extract check design.ext                # validate the job

See the full CLI reference (generated from --help).

Where it sits

.ext job in → .spef out, read directly by vyges-sta-si. Extraction accuracy is governed by the PDK’s parasitic rules — the engine is open, the calibration is foundry-specific. See the data spine.

Digital and analog / mixed-signal

The RC math is geometry × rules only — area / fringe capacitance and sheet / via resistance off the routed shapes, with no standard-cell or clocked-netlist assumption. So an analog / mixed-signal routed layout extracts exactly as a digital one does. Supplied as DEF it extracts today (the new examples/bias_gen/ is an analog bias-generator block); for GDS-only analog a new connectivity-tracing adapter (src/gds.rs) builds the DefNet graph straight from geometry, sitting above the unchanged RC core.

vyges loom extract run examples/bias_gen/bias_gen.ext -o bias_gen.spef   # analog bias-gen layout → SPEF

Honest bounds, the same for analog and digital: shapes are treated as axis-aligned rectangles, a via is a layer overlap, and pins lump into the net’s SPEF node. Scope here is physical parasitic extraction; analog functional / timing sign-off is out of scope (that leans on external SPICE / behavioral tools).

Source & releases