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vyges-layout — the geometry kernel

Foundation, not a sign-off engine. vyges-layout is the layout geometry kernel the other layout-side tools ride on — it does not produce a sign-off verdict or standard artifact the way the Loom engines do, and it’s not promoted as a vyges loom subcommand (it’s an internal foundation, used as a standalone vyges-layout binary). It’s listed here because it’s the substrate beneath the suite.

Everything on the layout side is geometry: LVS device extraction (GDS → devices + nets), DRC (width / spacing), metal fill, and viewing a die — they all need to read GDSII, do boolean operations on shapes, and flatten hierarchy. vyges-layout is that shared base: a clean-room, memory-safe Rust kernel, std-only and auditable, peer to KLayout’s database and gdstk (which are excellent but C++). It is the dependency that unblocks vyges-lvs native GDS extraction, and the future DRC, fill, and chip viewer.

Run it

vyges-layout info    block.gds                 # cells, layers, areas, bbox (+ --json)
vyges-layout boolean block.gds --top top --op and --a 67/20 --b 68/20 --out 100/0 -o and.gds
vyges-layout flatten block.gds --top top -o flat.gds
vyges-layout demo                              # built-in, no files

See the full CLI reference (generated from --help).

What it does (v0)

  • GDSII read/write — round-trips a library (BOUNDARY / PATH / SREF / AREF / BOX).
  • info — cells, per-cell element counts, layers, per-layer area — text or JSON.
  • boolean — AND / OR / NOT / XOR between two layers via a vertical scanline on rectilinear (Manhattan) polygons; integer coordinates → exact.
  • flatten — expand SREF / AREF hierarchy into one cell (composed transforms, arrays, cycle-guarded).

Honest bounds. v0 boolean is Manhattan — exact for any rectilinear polygon, returned as a set of tiling rectangles (contour-tracing into merged polygons is depth); general-angle geometry is bbox-approximated and counted, never silently dropped. General clipping (Vatti) is the depth pass.

Digital and analog / mixed-signal

The kernel has zero digital-vs-analog notion — it operates on raw GDS layers, datatypes and polygons, not on standard cells or any clocked abstraction. So an analog / mixed-signal layout round-trips and booleans exactly as a digital one does. The examples/analog/ fixture proves it on the shapes an analog designer actually draws — a guard ring (a donut polygon), a MIM capacitor (two overlapping plates on different layers), and a poly resistor snake — and tests/analog.rs checks exact write→read round-trip plus a cross-layer boolean (top-plate AND bottom-plate = the MIM cap area).

cargo run --example gen_analog                                   # generate examples/analog/analog.gds
vyges-layout info    examples/analog/analog.gds                  # cells, layers, areas — analog block
vyges-layout boolean examples/analog/analog.gds --top analog --op and --a 66/20 --b 65/20 --out 100/0 -o mim.gds

The Manhattan / rectilinear bound noted above is geometric, not domain-related — it applies to digital and analog shapes alike. Scope here is physical geometry; analog functional / timing sign-off is out of scope (that leans on external SPICE / behavioral tools).

Source & releases