vyges-sta-si — CLI reference

Generated from vyges-sta-si --help. Do not edit by hand — run scripts/gen-cli-reference.sh.

vyges-sta-si — sign-off static timing analysis with signal integrity

usage:
  vyges-sta-si run      JOB    [-o OUT] [--json] [--fail-on-violation] [--sdf FILE]
  vyges-sta-si sdc-lint JOB    [-o OUT] [--json] [--fail-on-violation]
                               (a job with `metadata: vyges-metadata.json` also checks the
                                SDC against the IP's declared clock_domains)
  vyges-sta-si check    JOB
  vyges-sta-si demo            [-o OUT] [--json]
  vyges-sta-si tcl      SCRIPT [-o OUT] [--json] [--fail-on-violation]   (experimental)

`sdc-lint` checks the SDC for completeness/consistency (unconstrained I/O, a clock with
no period, duplicate clocks, a clock on a port the design lacks) — independent of timing.

`tcl` runs an OpenSTA-style TCL *subset* (read_liberty/verilog/spef/sdc + inline SDC +
report_checks/report_wns/report_tns) through the Vyges engine — EXPERIMENTAL; not a TCL
interpreter and not a drop-in for LibreLane's corner.tcl. See docs/opensta-integration.md.

flags:
  -o FILE               write output to FILE (default: stdout)
  --json                machine-readable JSON instead of the text report
  --fail-on-violation   exit 3 if WNS < 0 (CI timing gate)
  --pdk NAME           resolve liberty from pdk-store (lib) when the job has none
  --corner C           PDK corner for --pdk (default: the PDK's default corner)
  --liberty-nldm-only   skip CCS (receiver_capacitance + output_current) at Liberty
                        load — faster/smaller for NLDM-only runs; forces the NLDM delay path
  --emit-liberty-json FILE  dump the merged Liberty IR (the shared model the timer +
                        vyges-power consume) as JSON for inspection / MCP, then run
  --sdf FILE            also write an SDF back-annotation file (IOPATH + setup/hold,
                        + INTERCONNECT from SPEF) — feeds gate-level / back-annotated sim
  -q, --quiet           suppress non-essential output
  -v, --verbose         extra detail on stderr
  --describe            print a machine-readable JSON description of the command
  -h, --help            show this help
  -V, --version         show version
  --bug-report     file a bug (central: vyges/community)
  --feature-request request a feature (central)
  --sponsor        sponsor Vyges (github.com/sponsors/vyges-ip)
  --star           star this tool on GitHub ⭐

Contract

Generated from vyges-sta-si --describe.

sta-si

static timing analysis with signal integrity (job → report)

Maturity: workflow-validated

run {job}

Consumes: netlist, liberty, spef

Artifacts: timing_report (report_path), sdf (sdf)

Assertion: timing-met — passes when timing_met is true

Provenance limitations

• The job names the netlist, Liberty and SPEF; input_hash covers the job path and arguments, not their contents, and Liberty include files are not enumerated.