vyges physical dft — CLI reference
Generated from vyges physical dft --help — this page is the tool’s own output, verbatim.
vyges physical dft — scan insertion and stitching, so a chip can be tested after fabrication
USAGE:
vyges physical dft replace <design.odb> --liberty FILE... -o OUT.odb [--dont-use CELL...]
replace each flop by its best-matching scan cell
vyges physical dft run <design.odb> --liberty FILE... --sdc FILE -o OUT.odb [--max-length N]
[--max-chains N] [--clock-mixing no_mix|clock_mix] [--trace]
stitch the planned chains and record them
vyges physical dft report <design.odb> --liberty FILE... --sdc FILE [--max-length N]
[--max-chains N] [--clock-mixing no_mix|clock_mix] [--verbose]
the scan chains as planned
vyges physical dft --describe
vyges physical dft --help
vyges physical dft --version
OPTIONS:
-o FILE write the report (or the output database) to FILE
--liberty FILE a Liberty library (repeatable, in read order; a cell resolves to the
first library that has it)
--dont-use CELL a scan cell `replace` must not use (repeatable; `*` and `?` match as in
a Tcl pattern)
--json machine-readable output instead of the text report
-q, --quiet suppress non-essential output
-v, --verbose extra detail on stderr
--describe print a machine-readable JSON description of the command
--bug-report file a bug (central: vyges/community)
--feature-request request a feature (central)
EXIT STATUS:
0 ok
1 a finding — the check ran and failed
2 usage or unreadable input
3 refused — this build does not implement the command yet
Contract
Generated from vyges physical dft --describe.
dft
Scan insertion and stitching, so a chip can be tested after fabrication.
Maturity: discovered
run {design} --liberty {liberty} --sdc {sdc} -o {out}
| Input | Type | Required | Description |
|---|---|---|---|
design | string | yes | design database (.odb) whose flops have been scan-replaced |
liberty | string | yes | Liberty library (.lib) holding the design’s cells |
sdc | string | yes | timing constraints (.sdc): the clocks that group the scan cells |
out | string | yes | database (.odb) to write, with the chains stitched and recorded |
max_length | integer | no | the longest chain wanted, in bits (default 200) |
max_chains | integer | no | at most this many chains per group; chains are lengthened rather than exceed it |
clock_mixing | string | no | whether a chain may mix clock domains (default no_mix) |
Consumes: odb, liberty, sdc
Artifacts: odb (out)
Assertion: dft-stitched — none; this operation establishes no engineering claim
Provenance limitations
replace,reportandrunare built; scan port name patterns are the defaults.reportandrunrefuse a design with child blocks, and constraints whose clocks are not each on one port.replacerefuses a library where two scan cells are equally close in drive to a flop, or where a pg_pin has no known pg_type.- The described call is
run: the scan chains planned over the design’s scan cells, stitched, recorded in the database and the database written toout. It stitches only flops that are already scan cells: runreplaceon the design first (the engine’s own arguments), or every flop is skipped with a DFT-0007 warning and 0 chains are stitched, exit 0. - One Liberty is described; more libraries (a cell resolves to the first that has it) need the engine’s own arguments.
runprints its log and writes the database; it has no –json output (a –json is refused as an unknown option, exit 2), so emits_json is false and the result is the printed log. The chain count is printed on stderr.- Scan stitching establishes no claim about the design: the assertion is not_applicable.
- input_hash covers the argument vector, not the content of the database, Liberty or SDC it names.